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CHAPTER 14 UART0
G
Parity bit
The addition of a parity bit can be set only in operation mode 0.The parity addition enable bit (SCR0: PEN)
and parity select bit (SCR0:P) can be used to select whether to use parity and to set the even or odd parity,
respectively.
In operation modes 1 and 2, no parity bit can be added.
The transmit/receive data when the parity bit enabled are shown in Figure 14.6-4.
Reception
SIN0
Transmission
SOT0
Transmission
SOT0
ST : Start bit
SP : Stop bit
Note: Parity bit is not set in operating mode 1 or mode 2.
418
Figure 14.6-4 Transmit/Receive Data when Parity Bit Enabled
ST
1
0
1
ST
1
0
1
ST
1
0
1
SP
1
0
0
1
0
1
SP
1
0
0
1
0
0
SP
1
0
0
1
0
1
Data
Parity
Parity error generated
by reception in even parity
(SCR0: PEN = 1, P = 0)
Transmission in
even parity
(SCR0: PEN = 1, P = 0)
Transmission in
odd parity
(SCR0: PEN = 1, P = 1)
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