Fujitsu MB90895 Series Hardware Manual page 408

CHAPTER 14 UART0
Table 14.3-2 Functions of Serial Control Register 0 (SCR0)
bit name
bit8 TXE:
transmit enable bit
bit9 RXE:
reception enable bit
bit10 REC:
Receive error flag clear
bit
bit11 A/D:
Address/data select bit
bit12 CL:
Data-length select bit
bit13 SBL:
Stop-bit length select bit
bit14 P:
Parity select bit
bit15 PEN:
Parity addition enable bit
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The bit enables or disables the UART0 for transmission.
When the bit is set to "0": Transmission is disabled.
When the bit is set to "1": Transmission is enabled.
Note:
When transmission is disabled, the device stops transmitting after transmitting
the current data from the serial output data register.
Before setting the bit to "0", write data to the serial output data register
(SODR0) and wait for a time of at least one sixteenth of the baud rate in the
asynchronous mode or for a time at least equal to the baud rate in the
synchronous mode.
The bit enables or disables the UART0 for reception.
When the bit is set to "0": Reception is disabled.
When the bit is set to "1": Reception is enabled.]
Note:
When reception is disabled, the device stops reception after storing the currently
received data to the serial input data register.
Clear the reception error flags (SSR0: FRE, ORE, PE) in the serial status register to
"0".
When the bit is set to "0": The FRE, ORE, and PE flags are cleared.
When the bit is set to "1": No effect.
Read: "1" is always read.
Note:
If reception interrupts have been enabled (SSR0: RIE = 1), set the REC bit to "0"
only when any of the FRE, ORE, and PE flags contains "1".
In operation mode 1, set the data format of frames to be transmitted/received.
When the bit is set to "0": The frame format is set to data frame.
When the bit is set to "1": The frame format is set to address data frame.
Specify the length of send and receive data.
Note:
A data length of seven bits can be selected only in operation mode 0.In operation
modes 1 and 2, be sure to set a data length of 8 bits.
Set the length of the stop bits (transmit data's frame end mark) in operation modes 0
and 1 (asynchronous).
Note:
At receiving, only the first bit of the stop bit is always detected.
Select either odd or even parity when the use of the parity bit has been selected
(SCR0: PEN = 1).
Specify whether to add (at sending) and detect (at receiving) a parity bit.
Note:
In operation modes 1 and 2, no parity bit can be added. Always set this bit to
"0".
Function