Fujitsu MB90895 Series Hardware Manual page 113

;----------Main program-----------------------------------
CODE CSEG
START:
AND CCR,#0BFH
MOV RP,#00
MOV A,#!STACK_T
MOV SSB,A
MOVW A,#STACK_T
MOVW SP,A
MOV I:DDR2,#00000000B
MOV BAPL,#00H
MOV BAPM,#30H
MOV BAPH,#00H
MOV ISCS,#00010001B
MOV IOAL,#00H
MOV IOAH,#00H
MOV DCTL,#64H
MOV DCTH,#00H
MOV I:ICR00,#00001000B ;EI
MOV I:ELVR,#00010000B
MOV I:EIRR,#00H
MOV I:ENIR,#10H
MOV ILM,#07H
OR CCR,#40H
:
LOOP: BRA LOOP
;----------Interrupt program-------------------------------------
WARI CLRB ER0
:
User processing
:
RETI
CODE ENDS
----------Vector setting-----------------------------------------
VECT CSEG ABS=0FFH
ORG 0FFD0H
DSL WARI
ORG 0FFDCH
DSL START
DB 00H
VECT ENDS
END START
;I flag of CCR in PS cleared to interrupt disabled
;Setting register bank pointer
;Setting system stack
;Setting system stack pointer
;in this case,S flag=1,so set to SSP
;Setting P24/INT4 pin to input
;Setting buffer address
;(003000 )
H
;Without I/O address renewal,byte transmission,
;With buffer address renewal
;Data transferred from I/O to buffer,
;and termination by resource
;Setting transmission source address
;(port 2: 000002 )
H
;Setting transmission byte number(100 bytes)
2 2
OS channel 0,EI
;Interrupt level 0(strongest)
;Regard INT4 as "H" level request
;Clear interrupt factor of INT4
;Interrupt enable of INT4
;Setting ILM in PS to level 7
;I flag of CCR in PS set to interrupt enabled
;No limit roop
;Clear interrupt/DTPrequest flag
;Check finish factor of EI
;Processing of data in buffer,
2
;Re-setting of EI OS, etc.
;Setting vector to interrupt #11(0BH)
;Reset vector setting
;Setting to single chip mode
OS enable,
2
OS,
CHAPTER 3 CPU
95