Fujitsu MB90895 Series Hardware Manual page 112

CHAPTER 3 CPU
;----------Interupt program-------------------------------------
ED_INT1:
MOV
NOP
NOP
NOP
NOP
NOP
NOP
RETI
CODE ENDS
;----------Vector setting----------------------------------------
VECT CSEG ABS=0FFH
ORG
DSL
ORG
DSL
DB
VECT ENDS
END
I Extended Intelligent I/O Service (EI
G
Processing specification
2
• EI OS is started upon detection of the High level of the signal input to the INT4 pin.
• When the High level is input to the INT4 pin, EI
memory address "3000
• The transfer data size is 100 bytes. After 100 bytes are transferred, an interrupt is generated upon
completion of transfer by EI
G
Coding example
DDR2 EQU
ENIR EQU
EIRR EQU
ELVR EQU
ICR00 EQU
BAPL EQU
BAPM EQU
BAPH EQU
ISCS EQU
IOAL EQU
IOAH EQU
DCTL EQU
DCTH EQU
ER0 EQU
STACK SSEG
RW
STACK_T RW
STACK ENDS
94
I:EIRR,#00H
0FFD0H
ED_INT1
0FFDCH
START
00H
START
2
OS) program
".
H
2
OS.
000012H
000030H
000031H
000032H
0000B0H
000100H
000101H
000102H
000103H
000104H
000105H
000106H
000107H
EIRR:0
100
1
;Prohibition of new INT4 reception
;Recover from interrupt
;Setting vector to interrupt #11(0BH)
;Setteing of reset vector
;Setting to single chip mode
2
OS is started and the data at port 2 is transferred to
;Port 2 direction register
;Interrupt/DTP enable register
;Interrupt/DTP factor register
;Request level setting register
;Interrupt control register
;Buffer address pointer lower
;Buffer address pointer middle
;Buffer address pointer upper
2
;EI OS status
;I/O address pointer lower
;I/O address pointer upper
;Data counter lower
;Data counter upper
;Definition of external interrupt
request flag bit
;Stack