Synchronization With Distributed Clocks - YASKAWA SGD7S-1R9D Product Manual

12.5 Synchronization with Distributed Clocks

12.5

Synchronization with Distributed Clocks

The synchronization of EtherCAT communications is based on a mechanism called a distrib-
uted clock. With the distributed clock, all devices are synchronized with each other by sharing
the same reference clock. The slave devices synchronize the internal applications to the Sync0
events that are generated according to the reference clock.
You can use the following synchronization modes with EtherCAT (CoE). You can change the
synchronization mode in the Sync Control registers (ESC registers 0x980 and 0x981).
• Free-Run (ESC register 0x980 = 0x0000)
In Free-Run mode, the local cycle is independent from the communications cycle and master
cycle.
• DC Mode (ESC register 0x980 = 0x0300)
In this mode, the SERVOPACK is synchronized with the host controller (master) on the Sync0
event.
The following figure gives a timing chart for DC synchronization.
Host controller
(master)
Network
Slave
12-8
Master application task
Master user
shift time
Frame
S0 Sync0
event
Cycle time (1C32 hex: 02)
Shift time (1C33 hex: 03)
Calc and copy time
(1C33 hex: 06)
Master application task
U
Frame
Sync0 shift time
Sync0
S0
event
Cycle time (1C32 hex: 02)
Master application task
U
Frame
Sync0
S0
event
Cycle time (1C32 hex: 02)
Shift time (1C32 hex: 03)
Calc and copy time
Outputs Valid
(1C32 hex: 06)
U
S0