D1 Hardware Configuration Info - Motorola ColdFire MCF5281 User Manual

Motorola microcontroller user's manual
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31
30
Field
CL
Reset
R/W
15
14
Field
BUSW
Reset
R/W
Table 2-9. D1 Local Memory Hardware Configuration
Bits
Name
31–30
CL
Cache line size. This field is fixed to a hex value of 0x0 indicating a 16-byte cache line size.
29–28
ICA
Instruction cache associativity.
00 Four-way.
01 Direct mapped. (This is the value used for MCF5282)
27–24
ICSIZ
Instruction cache size.
0000 No instruction cache.
0001 512B instruction cache.
0010 1KB instruction cache.
0011 2KB instruction cache. (This is the value used for MCF5282)
0100 4KB instruction cache.
0101 8KB instruction cache.
0110 16KB instruction cache.
0111 32KB instruction cache.
1000 64KB instruction cache.
0x9–0xF Reserved.
MOTOROLA
29
28
27
ICA
ICSIZ
0001_0011_1011_0000
13
12
11
DCA
DCSIZ
0001_0000_1000_0000
Figure 2-9. D1 Hardware Configuration Info
Information Field Description
Chapter 2. ColdFire Core
24
23
RAM0SIZ
R
8
7
RAM1SIZ
R
Description
Processor Exceptions
20
19
16
ROM0SIZ
4
3
ROM1SIZ
0
2-19

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