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Interval timer single-scan mode does not start the
periodic/interval timer until the single-scan enable bit is set.
These conditions will cause a pulsed reset of the periodic/interval timer during use:
• A queue 1 operating mode change to a mode which uses the periodic/interval timer,
even if queue 2 is already using the timer
• A queue 2 operating mode change to a mode which uses the periodic/interval timer,
provided queue 1 is not in a mode which uses the periodic/interval timer
• Roll over of the timer
During stop mode, the periodic/interval timer is held in reset. Because stop mode causes
QACR1 and QACR2 to be reset to 0, a valid periodic or interval timer mode must be written
after leaving stop mode to release the timer from reset.
When QADC debug mode is entered and a periodic or interval timer mode is selected, the
timer counter is reset after the conversion in progress completes. When the periodic or
interval timer mode has been enabled (the timer is counting), but a trigger event has not
been issued, debug mode takes effect immediately, and the timer is held in reset. Removal
of the QADC debug condition restarts the counter from the beginning. Refer to
Section 27.3.1 for more information.
27.8.10 Conversion Command Word Table
The conversion command word (CCW) table is 64 half-word (128 byte) long RAM with 10
bits of each entry implemented. The CCW table is written by the user and is not modified
by the QADC. Each CCW requests the conversion of one analog channel to a digital result.
The CCW specifies the analog channel number, the input sample time, and whether the
queue is to pause after the current CCW. The 10 implemented bits of the CCW can be read
and written. The remaining six bits are unimplemented and read as 0s; write operations
have no effect. Each location in the CCW table corresponds to a location in the result word
table. When a conversion is completed for a CCW entry, the 10-bit result is written in the
corresponding result word entry.
The beginning of queue 1 is the first location in the CCW table. The first location of queue
2 is specified by the beginning of queue 2 pointer field (BQ2) in QACR2. To dedicate the
entire CCW table to queue 1, place queue 2 in disabled mode and write BQ2 to 64 or
greater. To dedicate the entire CCW table to queue 2, place queue 1 in disabled mode and
set BQ2 to the first location in the CCW table (CCW0).
Figure 27-43 illustrates the operation of the queue structure.
MOTOROLA
Chapter 27. Queued Analog-to-Digital Converter (QADC)
NOTE
Digital Control Subsystem
27-59
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