Motorola ColdFire MCF5281 User Manual page 104

Motorola microcontroller user's manual
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ColdFire Instruction Set Architecture Enhancements
STRLDSR
Operation:
Assembler Syntax:STRLDSR #<data>
Attributes:
Instruction
15
14
Format:
0
1
0
1
Description: Pushes the contents of the Status Register onto the stack and then reloads
the Status Register with the immediate data value. This instruction is intended for use as
the first instruction of an interrupt service routine shared across multiple interrupt request
levels. It allows the level of the just-taken interrupt request to be stored in memory (using
the SR[IML] field), and then masks interrupts by loading the SR[IML] field with 0x7 (if
desired). If execution is attempted with bit 13 of the immediate data cleared (attempting
to place the processor in user mode), a privilege violation exception is generated. The
opcode for STRLDSR is 0x40E7 46FC.
Condition
X
Codes:
STRLDSR
Opcode present
2-32
Store/Load Status Register
(Supported Starting with ISA A+)
If Supervisor State
Then SP - 4 → SP; zero-filled SR → (SP); immediate data → SR
Else TRAP
Size = word
13
12
11
10
0
0
0
0
0
0
0
1
N
Z
V
C
V2, V3 Core (ISA_A)
MCF5282 User's Manual
9
8
7
6
0
0
1
1
1
0
1
1
Immediate Data
X Set to the value of bit 4 of the immediate operand
N Set to the value of bit 3 of the immediate operand
Z Set to the value of bit 2 of the immediate operand
V Set to the value of bit 1 of the immediate operand
C Set to the value of bit 0 of the immediate operand
V4 Core (ISA_B)
No
No
STRLDSR
5
4
3
2
1
1
0
0
1
1
1
1
1
1
0
V2 Core (ISA_A+)
Yes
MOTOROLA
0
1
0

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