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WP — Write Protect
This bit is used to restrict writes to the address range defined by the corresponding
chip select.
0 = Writes are allowed in this chip select address space.
1 = Writes are prohibited. An attempt to write to an address mapped by this chip
select will result in a TEA to the CPU and no assertion of the chip select out-
put.
PA — Pin Assert
This bit is used to control the chip select pin when it is operating as a programmable
output pin (i.e., the CSEN bit clear). This bit is ignored if the CSEN bit is set. At reset,
PA bit is set for CS[1:2] and cleared for CS3.
0 = Brings chip select output to logic-low level
1 = Brings chip select output to logic-high level
CSEN — Chip Select Enable
This bit controls the operation of the chip select pin.
0 = Chip select function is disabled. An attempted access to an address mapped
by this chip select will result in TEA assertion to the CPU and no assertion of
the chip select output.
When disabled, the pin is a general-purpose output controlled by the value
of the PA control bit. When CSEN0 is clear, CS0 is inactive.
1 = Chip select is enabled and is asserted when an access address falls within
the range specified by the memory map in Table 7-1. With the exception of
CS0, this bit is cleared by reset, disabling the chip select output pin.
CSEN0 is set at reset to allow CS0 to select from an external boot ROM if
MOD is driven to a logic-low level four LOW_REFCLK clock cycles before
RSTOUT negation. When the chip select is enabled, the PA control bit is
ignored.
7.7 EIM Configuration Register
The EIM configuration register contains control bits that configure the EIM and other
internal blocks for certain operation modes.
Access this register with 32-bit loads and stores only.
EIMCR — EIM Configuration Register
31
30
29
28
R
0
0
0
0
W
RESET:
15
14
13
12
R
0
0
0
0
W
RESET:
MMC2001
REFERENCE MANUAL
All manuals and user guides at all-guides.com
Freescale Semiconductor, Inc.
27
26
25
24
0
0
0
0
11
10
9
8
0
0
0
0
Figure 7-5 EIM Configuration Register
EXTERNAL INTERFACE MODULE
For More Information On This Product,
Go to: www.freescale.com
23
22
21
20
0
0
0
0
7
6
5
4
0
SP
SZEN PSTEN
RAM
0
0
1
10004018
19
18
17
16
0
0
0
0
3
2
1
0
SP
HDB
SHEN
ROM
1
0
0
0
MOTOROLA
7-11
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