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Table 14-2. MCF5282 Alphabetical Signal Index (Continued)
Abbreviation
EMDIO
ERXCLK
ERXD[3:1]
ERXD0
ERXDV
ERXER
ETXCLK
ETXD[3:1]
ETXD0
ETXEN
ETXER
EXTAL
VDDF, VSSF
VPP
GPTA[3:0]
GPTB[3:0]
Ground
IRQ[7:1]
JTAG_EN
OE
VDDPLL
VDD
PST[3:0]
VRH, VRL
VDDA, VSSA
MOTOROLA
Transfers control information between the external PHY and
the media access controller.
Provides a timing reference for ERXDV, ERXD[3:0], and
ERXER.
Contain the Ethernet input data transferred from the PHY to the
media access controller (when ERXDV is asserted in MII
mode).
Ethernet input data transferred from the PHY to the media
access controller (when ERXDV is asserted).
Asserted to indicate that the PHY has valid nibbles present on
the MII.
Indicates (when asserted with ERXDV) that the PHY has
detected an error in the current frame.
Provides a timing reference for ETXEN, ETXD[3:0], and
ETXER.
Contain the serial output Ethernet data.
Serial output Ethernet data.
Indicates when valid nibbles are present on the MII.
Asserted (for one or more E_TXCLKs while ETXEN is also
asserted) to cause the PHY to send one or more illegal
symbols.
Driven by an external clock except when used as a connection
to the external crystal.
Supply power and ground to Flash array.
Used for Flash stress testing.
Provide the external interface to the timer A functions.
Provide the external interface to the timer B functions.
Negative supply.
External interrupt sources.
Selects between multiplexed debug module and JTAG signals
at reset.
Indicates when an external device can drive data on the bus.
Isolate the PLL analog circuitry from digital power supply noise.
Supplies positive power to the core logic and I/O pads.
Indicate core status.
High (VRH) and low (VRL) reference potentials for the analog
converter.
Isolate the QADC analog circuitry from digital power supply
noise.
Chapter 14. Signal Descriptions
Function
Overview
I/O
I/O
I
I
I
I
I
I
O
O
O
O
I
I
I
I/O
I/O
I
I
O
I
I
O
I
I
14-9
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