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Functional Description
20.6 Functional Description
The General Purpose Timer (GPT) module is a 16-bit, 4-channel timer with input capture
and output compare functions and a pulse accumulator.
20.6.1 Prescaler
The prescaler divides the module clock by 1, 2, 4, 8, 16, 32, 64, or 128. The PR[2:0] bits in
GPTSCR2 select the prescaler divisor.
20.6.2 Input Capture
Clearing an I/O select bit, IOSn, configures channel n as an input capture channel. The
input capture function captures the time at which an external event occurs. When an active
edge occurs on the pin of an input capture channel, the timer transfers the value in the GPT
counter into the GPT channel registers, GPTCn.
The minimum pulse width for the input capture input is greater than two module clocks.
The input capture function does not force data direction. The GPT port data direction
register controls the data direction of an input capture pin. Pin conditions such as rising or
falling edges can trigger an input capture only on a pin configured as an input.
An input capture on channel n sets the CnF flag. The CnI bit enables the CnF flag to
generate interrupt requests.
20.6.3 Output Compare
Setting an I/O select bit, IOSn, configures channel n as an output compare channel. The
output compare function can generate a periodic pulse with a programmable polarity,
duration, and frequency. When the GPT counter reaches the value in the channel registers
of an output compare channel, the timer can set, clear, or toggle the channel pin. An output
compare on channel n sets the CnF flag. The CnI bit enables the CnF flag to generate
interrupt requests.
The output mode and level bits, OMn and OLn, select, set, clear, or toggle on output
compare. Clearing both OMn and OLn disconnects the pin from the output logic.
Setting a force output compare bit, FOCn, causes an output compare on channel n. A forced
output compare does not set the channel flag.
A successful output compare on channel 3 overrides output compares on all other output
compare channels. A channel 3 output compare can cause bits in the output compare 3 data
register to transfer to the GPT port data register, depending on the output compare 3 mask
register. The output compare 3 mask register masks the bits in the output compare 3 data
register. The GPT counter reset enable bit, TCRE, enables channel 3 output compares to
MOTOROLA
Chapter 20. General Purpose Timer Modules (GPTA and GPTB)
20-17
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