Descriptor Individual Upper Address Register (Iaur); Descriptor Individual Lower Address Register (Ialr); Iaur Field Descriptions - Motorola ColdFire MCF5281 User Manual

Programming Model
31
Field
Reset
R/W
15
Field
Reset
R/W
Address
Figure 17-17. Descriptor Individual Upper Address Register (IAUR)
Bits
31–0
17.5.4.15 Descriptor Individual Lower Address (IALR)
The IALR register is written by the user. This register contains the lower 32 bits of the
64-bit individual address hash table used in the address recognition process to check for
possible match with the DA field of receive frames with an individual DA. This register is
not reset and must be initialized by the user.
31
Field
Reset
R/W
15
Field
Reset
R/W
Address
Figure 17-18. Descriptor Individual Lower Address Register (IALR)
17-38
Uninitialized
Uninitialized
IPSBAR + 0x1118
Table 17-26. IAUR Field Descriptions
Name
IADDR1 The upper 32 bits of the 64-bit hash table used in the address
recognition process for receive frames with a unicast
address. Bit 31 of IADDR1 contains hash index bit 63. Bit 0
of IADDR1 contains hash index bit 32.
Uninitialized
Uninitialized
IPSBAR + 0x111C
MCF5282 User's Manual
IADDR1
R/W
IADDR1
R/W
Descriptions
IADDR2
R/W
IADDR2
R/W
16
0
16
0
MOTOROLA