Pad Module Configuration Register (Pdmcr) - Motorola MPC533 Reference Manual

Pad Module Configuration Register (PDMCR)

.
Pad Name
1
TDI/DSDI/MDI0
TDO/DSDO/MDO0
VF0/MPIO32B0/MDO1
VF1/MPIO32B1/MCKO
VF2/MPIO32B2/MSEI
VFLS0/MPIO32B3/MSEO
1
TDI in JTAG mode, DSDI in BDM mode.
2
TDO in JTAG mode, DSDO in BDM mode.
3
Selected by the VF bit in the MIOS14TPCR.
4
Selected by the VFLS bit in the MIOS14TPCR.
2.3 Pad Module Configuration Register (PDMCR)
Pad Name
MPWM0/MDI1
MPWM1/MDO2
MPWM17/MDO3
IRQ0/SGPIOC0/MDO4
MPIO32B5/MDO5
MPIO32B6 / MPWM4 / MDO6
MPWM18/MDO6
MPWM19/MDO7
1
The MDO6 bit in the PDMCR2 register determines where the MDO6 signal is available.
Bits in the PDMCR (which resides in the SIU memory map) control the slew rate and weak
pull-up/pull-down characteristics of some signals; refer to Appendix E, "Electrical
Characteristics." The PORESET/TRST signal resets all the PDMCR bits asynchronously.
2-22
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Table 2-3. Reduced and Full Port Mode Pads
Functionality in Reduced
MDI0
MDO0
MDO1
MCKO
MSEI
MSEO
Table 2-4. Full Port Only Mode Pads
Functionality in Full Port
MDI1
MDO2
MDO3
MDO4
MDO5
MDO6
MDO6
MDO7
MPC533 Reference Manual
Functionality When Not in
Port Mode
TDI/DSDI
TDO/DSDO
VF0/MPIO32B0
VF1/MPIO32B1
VF2/MPIO32B2
VFLS0/MPIO32B3
Functionality when not in
Mode
MPWM0
MPWM1
MPWM17
IRQ0/SGPIOC0
MPIO32B5
1
MPIO32B6/MPWM4
1
MPWM18
MPWM19
Reduced Port Mode
2
3
3
3
4
Full Port Mode
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