Processor Bus Output Timing Specifications
Table 33-11. External Bus Output Timing Specifications (Continued)
Name
B8
CLKOUT high to address (A[23:0]) and control (TS,
SIZ[1:0], TIP, R/W) valid
B9
CLKOUT high to address (A[23:0]) and control (TS,
SIZ[1:0], TIP, R/W) invalid
B11
CLKOUT high to data output (D[31:0]) valid
B12
CLKOUT high to data output (D[31:0]) invalid
B13
CLKOUT high to data output (D[31:0]) high impedance
1
CSn transitions after the falling edge of CLKOUT.
2
BS transitions after the falling edge of CLKOUT.
3
OE transitions after the falling edge of CLKOUT.
Read/write bus timings listed in Table 33-11 are shown in Figure 33-2, Figure 33-3, and
Figure 33-4.
33-12
Characteristic
Address and Attribute Outputs
Data Outputs
MCF5282 User's Manual
Symbol
Min
t
—
CHAV
t
2
CHAI
t
—
CHDOV
t
2
CHDOI
t
—
CHDOZ
Max
Unit
10
ns
—
ns
10
ns
—
ns
6
ns
MOTOROLA