Programming Model
Bits
31–2
1–0
17.5.4.23 Receive Buffer Size Register (EMRBR)
The EMRBR is a 9-bit register programmed by the user. The EMRBR register dictates the
maximum size of all receive buffers. Note that because receive frames will be truncated at
2k-1 bytes, only bits 10–4 are used. This value should take into consideration that the
receive CRC is always written into the last receive buffer. To allow one maximum size
frame per buffer, EMRBR must be set to RCR[MAX_FL] or larger. The EMRBR must be
evenly divisible by 16. To insure this, bits 3-0 are forced low. To minimize bus utilization
(descriptor fetches) it is recommended that EMRBR be greater than or equal to 256 bytes.
The EMRBR register does not reset, and must be initialized by the user.
31
Field
Reset
R/W
15
Field
—
Reset
R/W
Address
Figure 17-26. Receive Buffer Size Register (EMRBR)
Bits
30–11
10–4
3–0
17-44
Table 17-34. ETDSR Field Descriptions
Name
X_DES_START Pointer to start of transmit buffer descriptor queue.
—
Reserved, should be cleared.
11
10
IPSBAR + 0x11B8
Table 17-35. EMRBR Field Descriptions
Name
—
Reserved, should be written to 0 by the host processor.
R_BUF_SIZE
Receive buffer size.
—
Reserved, should be written to 0 by the host processor.
MCF5282 User's Manual
Descriptions
—
Uninitialized
R/W
R_BUF_SIZE
Uninitialized
R/W
Descriptions
4
3
—
MOTOROLA
16
0