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as temporary storage during miss processing. For all data cache configurations, the memory
operates in write-through mode and all operand writes generate an external bus cycle.
1.1.1.2
SRAM
The SRAM module provides a general-purpose 64-Kbyte memory block that the ColdFire
core can access in a single cycle. The location of the memory block can be set to any
64-Kbyte boundary within the 4-Gbyte address space. The memory is ideal for storing
critical code or data structures, for use as the system stack, or for storing FEC data buffers.
Because the SRAM module is physically connected to the processor's high-speed local bus,
it can quickly service core-initiated accesses or memory-referencing commands from the
debug module.
The SRAM module is also accessible by non-core bus masters, for example the DMA
and/or the FEC. The dual-ported nature of the SRAM makes it ideal for implementing
applications with double-buffer schemes, where the processor and a DMA device operate
in alternate regions of the SRAM to maximize system performance. As an example, system
performance can be increased significantly if Ethernet packets are moved from the FEC
into the SRAM (rather than external memory) prior to any processing.
1.1.1.3
Flash
This product incorporates SuperFlash® technology licensed from SST. The ColdFire Flash
Module (CFM) is a non-volatile memory (NVM) module for integration with the processor
core. The CFM is constructed with eight banks of 32K x 16-bit Flash arrays to generate
512 Kbytes of 32-bit Flash memory
The CFM on the MCF5281 is constructed with four banks of
32K x 16-bit Flash arrays to generate 256 Kbytes of 32-bit
Flash memory.
These arrays serve as electrically erasable and programmable, non-volatile program and
data memory. The Flash memory is ideal for program and data storage for single-chip
applications allowing for field reprogramming without requiring an external programming
voltage source. The CFM interfaces to the V2 ColdFire core through an optimized
read-only memory controller which supports interleaved accesses from the 2-cycle Flash
arrays. A "backdoor" mapping of the Flash memory is used for all program, erase, and
verify operations. It also provides a read datapath for non-core masters (for example,
DMA).
1.1.1.4
Debug Module
The ColdFire processor core debug interface is provided to support system debugging in
conjunction with low-cost debug and emulator development tools. Through a standard
MOTOROLA
NOTE
Chapter 1. Overview
MCF5282 Key Features
1-9
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