Ccw Priority Situation 4; Ccw Priority Situation 5 - Motorola ColdFire MCF5281 User Manual

IDLE
Q1:
Q2:
0000
QS:
Situation S5 (Figure 27-27) shows that when multiple queue 2 trigger events are detected
while queue 1 is busy, the trigger overrun error bit is set, but queue 1 execution is not
disturbed. Situation S5 also shows that the effect of queue 2 trigger events during queue 1
execution is the same when the pause feature is used for either queue.
IDLE
Q1:
IDLE
Q2:
0000
QS:
The remaining situations, S6 through S11, show the impact of a queue 1 trigger event
occurring during queue 2 execution. Because queue 1 has higher priority, the conversion
taking place in queue 2 is aborted so that there is no variable latency time in responding to
queue 1 trigger events.
In situation 6 (Figure 27-28), the conversion initiated by the second CCW in queue 2 is
aborted just before the conversion is complete, so that queue 1 execution can begin. Queue
2 is considered suspended. After queue 1 is finished, queue 2 starts over with the first CCW,
MOTOROLA
T1
Q1:
C1 C2 C3
T2
Q2:
ACTIVE
IDLE TRIGGERED
1000 1011
Figure 27-26. CCW Priority Situation 4
T1
Q1:
C1 C2
T2 T2
PF1
Q2:
C1
TOR2
ACTIVE
TRIG ACTIVE
1000 1011 0110
Figure 27-27. CCW Priority Situation 5
Chapter 27. Queued Analog-to-Digital Converter (QADC)
C4
CF1
C1 C2 C3 C4
ACTIVE
0010
T1
C3 C4
T2 T2
CF1
C2
TOR2
PF2
PAUSE ACTIVE ACTIVE
PAUSE TRIG
0101 1001 1011
Digital Control Subsystem
CF2
IDLE
IDLE
0000
C3 C4
CF2
IDLE
ACTIVE IDLE
0010 0000
27-43