Read Cycle - Motorola ColdFire MCF5281 User Manual

Data Transfer Operation
State Cycle CLKOUT
S3 Read/write Low
(skipped for
fast
termination)
Read
S4 All High
Read
(including
fast-terminat
ion)
S5 S5 Low
Read
Write
An external device has at most two CLKOUT cycles after the
start of S4 to three-state the data bus. This applies to basic read
cycles, fast termination cycles, and the last transfer of a burst.

13.4.3 Read Cycle

During a read cycle, the MCF5282 receives data from memory or from a peripheral device.
Figure 13-5 is a read cycle flowchart.
13-6
Table 13-3. Bus Cycle States (Continued)
The MCF5282 waits for TA assertion. If TA is not sampled as asserted before the
rising edge of CLKOUT at the end of the first clock cycle, the MCF5282 inserts
wait states (full clock cycles) until TA is sampled as asserted.
Data is made available by the external device on the falling edge of CLKOUT and
is sampled on the rising edge of CLKOUT with TA asserted.
The external device should negate TA.
The external device can stop driving data after the rising edge of CLKOUT.
However data could be driven through the end of S5.
CS, BS, and OE are negated on the CLKOUT falling edge of S5. The MCF5282
stops driving address lines and R/W on the rising edge of CLKOUT, terminating
the read or write cycle. At the same time, the MCF5282 negates TIP, and SIZ[1:0]
on the rising edge of CLKOUT.
Note that the rising edge of CLKOUT may be the start of S0 for the next access
cycle.
The external device stops driving data between S4 and S5.
The data bus returns to high impedance on the rising edge of CLKOUT. The
rising edge of CLKOUT may be the start of S0 for the next access.
NOTE:
MCF5282 User's Manual
Description
MOTOROLA