Qadc Status Register 0 (Qasr0) - Motorola ColdFire MCF5281 User Manual

Register Descriptions
When a queue enters the paused state, CWP points to the CCW with the pause bit set. While
in pause, the CWP value is maintained until a trigger event occurs on either queue. Usually,
the CWP is updated a few clock cycles before the queue status field shows that the queue
has become active. For example, a read of CWP may point to a CCW in queue 2, while the
queue status field shows queue 1 paused and queue 2 trigger pending.
When the QADC finishes a queue scan, the CWP points to the CCW where the
end-of-queue condition was detected. Therefore, when the end-of-queue condition is a
CCW with the EOQ code (channel 63), the CWP points to the CCW containing the EOQ.
When the last CCW in a queue is the last CCW table location (CCW63), and it does not
contain the EOQ code, the end-of-queue is detected when the following CCW is read, so
the CWP points to word CCW0.
Finally, when queue 1 operation is terminated after a CCW is read that is pointed to by BQ2,
the CWP points to the same CCW as BQ2.
15
Field CF1
Reset
R/W:
7
Field QS7
Reset
R/W:
Address
27-22
14 13
PF1 CF2
R/W
6 5
QS6 CWP5
IPSBAR + 0x19_0010, 0x19_0011
Figure 27-11. QADC Status Register 0 (QASR0)
MCF5282 User's Manual
12 11
PF2 TOR1 TOR2
0000_0000
4 3
CWP4 CWP3 CWP2
0000_0000
R
10 9 8
QS9 QS8
R
2 1 0
CWP1 CWP0
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