D0 Hardware Configuration Info Field Description - Motorola ColdFire MCF5281 User Manual

Processor Exceptions
Table 2-8. D0 Hardware Configuration Info Field Description
Bits Name
31–24 PF Processor family. This field is fixed to a hex value of 0xCF indicating a ColdFire core is present.
23–20 VER ColdFire core version number. This field is fixed to a hex value of 0x2 indicating a Version 2 ColdFire
core.
19–16 REV Processor revision number.
15 MAC MAC execute engine status. Indicates if optional MAC unit is present.
0 MAC execute engine not present in core. (This is the value used for MCF5282.)
1 MAC execute engine is present in core.
14 DIV Divide execute engine status. Indicates if optional hardware divide unit is present.
0 Divide execute engine not present in core.
1 Divide execute engine is present in core. (This is the value used for MCF5282.)
13 EMAC EMAC execute engine status. Indicates if optional enhanced MAC unit is present.
0 EMAC execute engine not present in core.
1 EMAC execute engine is present in core. (This is the value used for MCF5282.)
12 FPU FPU execute engine status. Indicates if optional FPU unit is present.
0 FPU execute engine not present in core. (This is the value used for MCF5282)
1 FPU execute engine is present in core.
11 MMU Virtual memory management unit status. Indicates if optional MMU unit is present.
0 MMU execute engine not present in core. (This is the value used for MCF5282)
1 MMU execute engine is present in core.
10–8 — Reserved.
7–4 ISA Instruction set architecture (ISA) revision number.
0000 ISA_A
0001 ISA_B
0010 ISA_C
1000 ISA_A+ (ISA_A with the addition of the BYTEREV, BITREV, FF1, and STLDSR instructions.
This is the value used for MCF5282.)
0x3-0xF Reserved.
3–0 DEBUG Debug module revision number.
0000 DEBUG_A (This is the value used for MCF5282)
0001 DEBUG_B
0010 DEBUG_C
0011 DEBUG_D
0100 DEBUG_E
0x5-0xF Reserved.
Information loaded into D1 defines the local memory hardware configuration as shown in
Figure 2-9.
2-18
Description
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