Table of Contents
Advertisement
CLKOUT
BKPT
(Input)
33.16 Debug AC Timing Specifications
Table 33-24 lists specifications for the debug AC timing parameters shown in Figure 33-21.
Num
D1
D2
D3
1
D4
D5
D6
D7
D8
1
DSCLK and DSI are synchronized internally. D4 is measured from the
synchronized DSCLK input relative to the rising edge of CLKOUT.
MOTOROLA
V
IL
Figure 33-19. BKPT Timing
Table 33-24. Debug AC Timing Specification
Characteristic
PST, DDATA to TCLK setup
TCLK to PST, DDATA hold
DSI-to-DSCLK setup
DSCLK-to-DSO hold
DSCLK cycle time
BKPT input data setup time to
CLKOUT Rise
BKPT input data hold time to
CLKOUT Rise
CLKOUT high to BKPT high Z
Chapter 33. Electrical Characteristics
Debug AC Timing Specifications
V
IH
B2b
B1b
15
16
Input Data Valid
17
Min
Max
Units
5
ns
2
ns
1
CLKOUT
cycles
4
CLKOUT
cycles
5
CLKOUT
cycles
5.0
ns
2.0
ns
0.0
10.0
ns
33-27
Advertisement
Table of Contents
