Fast Ethernet Ac Timing Specifications - Motorola ColdFire MCF5281 User Manual

Fast Ethernet AC Timing Specifications

Table 33-16 lists specifications for the I
Table 33-16. I
Num
1
I1 Start condition hold time
1
I2 Clock low period
2
I3 SCL/SDA rise time (V
1
I4 Data hold time
3
I5 SCL/SDA fall time (V
1
I6 Clock high time
1
I7 Data setup time
1
I8 Start condition setup time (for repeated start
condition only)
1
I9 Stop condition setup time
1
Note: Output numbers depend on the value programmed into the IFDR; an IFDR programmed
with the maximum frequency (IFDR = 0x20) results in minimum output timings as shown in
Table 33-16. The I
the middle of the SCL low period. The actual position is affected by the prescale and division
values programmed into the IFDR; however, the numbers given in Table 33-16 are minimum
values.
2
Because SCL and SDA are open-collector-type outputs, which the processor can only actively
drive low, the time SCL or SDA take to reach a high level depends on external signal
capacitance and pull-up resistor values.
3
Specified at a nominal 50-pF load.
Figure 33-9 shows timing for the values in Table 33-15 and Table 33-16.
SCL
I1
SDA
33.12 Fast Ethernet AC Timing Specifications
MII signals use TTL signal levels compatible with devices operating at either 5.0 V or
3.3 V.
33-20
2
C output timing parameters shown in Figure 33-9.
2
C Output Timing Specifications between SCL and SDA
Characteristic
= 0.5 V to V
IL
= 2.4 V to V
IH
2
C interface is designed to scale the actual data transition time to move it to
I2 I6
I4
2
Figure 33-9. I C Input/Output Timings
MCF5282 User's Manual
Min
6
10
= 2.4 V) —
IH
7
= 0.5 V) —
IL
10
2
20
10
I8
I7
Max Units
— Bus clocks
— Bus clocks
— µS
— Bus clocks
3 ns
— Bus clocks
— Bus clocks
— Bus clocks
— Bus clocks
I5
I3
I9
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