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Paragraph
Number
24.4.4
Clock Stretching ........................................................................................... 24-5
24.5
Programming Model ......................................................................................... 24-6
2
24.5.1
I
C Address Register (I2ADR) ..................................................................... 24-6
2
24.5.2
I
C Frequency Divider Register (I2FDR)..................................................... 24-7
2
24.5.3
I
C Control Register (I2CR)......................................................................... 24-8
2
24.5.4
I
C Status Register (I2SR)............................................................................ 24-9
2
24.5.5
I
C Data I/O Register (I2DR) ..................................................................... 24-10
2
24.6
I
C Programming Examples ........................................................................... 24-10
24.6.1
Initialization Sequence................................................................................ 24-10
24.6.2
Generation of START................................................................................. 24-11
24.6.3
Post-Transfer Software Response............................................................... 24-11
24.6.4
Generation of STOP.................................................................................... 24-12
24.6.5
Generation of Repeated START................................................................. 24-13
24.6.6
Slave Mode ................................................................................................. 24-13
24.6.7
Arbitration Lost........................................................................................... 24-14
25.1
Features ............................................................................................................. 25-1
25.1.1
FlexCAN Memory Map................................................................................ 25-3
25.1.2
External Signals ............................................................................................ 25-3
25.2
The CAN System .............................................................................................. 25-4
25.3
Message Buffers ............................................................................................... 25-4
25.3.1
Message Buffer Structure ............................................................................. 25-4
25.3.2
Message Buffer Memory Map...................................................................... 25-7
25.4
Functional Overview......................................................................................... 25-8
25.4.1
Transmit Process........................................................................................... 25-9
25.4.2
Receive Process ............................................................................................ 25-9
25.4.3
Message Buffer Handling ........................................................................... 25-10
25.4.4
Remote Frames ........................................................................................... 25-12
25.4.5
Overload Frames......................................................................................... 25-13
25.4.6
Time Stamp................................................................................................. 25-13
25.4.7
Listen-Only Mode....................................................................................... 25-13
25.4.8
Bit Timing................................................................................................... 25-14
25.4.9
FlexCAN Error Counters ............................................................................ 25-15
25.4.10
FlexCAN Initialization Sequence ............................................................... 25-16
25.4.11
Special Operating Modes............................................................................ 25-17
25.4.12
Interrupts..................................................................................................... 25-19
25.5
Programmer's Model ...................................................................................... 25-20
25.5.1
CAN Module Configuration Register (CANMCR).................................... 25-20
25.5.2
FlexCAN Control Register 0 (CANCTRL0) .............................................. 25-22
MOTOROLA
CONTENTS
Title
Chapter 25
FlexCAN
Contents
Page
Number
xvii
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