Motorola ColdFire MCF5281 User Manual page 495

Operation
from the CPU to a serial bit stream on UTXDn. It automatically sends a start bit followed
by the programmed number of data bits, an optional parity bit, and the programmed number
of stop bits. The lsb is sent first. Data is shifted from the transmitter output on the falling
edge of the clock source.
After the stop bits are sent, if no new character is in the transmitter holding register, the
UTXDn output remains high (mark condition) and the transmitter empty bit,
USRn[TxEMP], is set. Transmission resumes and TxEMP is cleared when the CPU loads
a new character into the UART transmit buffer (UTBn). If the transmitter receives a disable
command, it continues until any character in the transmitter shift register is completely
sent.
If the transmitter is reset through a software command, operation stops immediately (see
Section 23.3.5, "UART Command Registers (UCRn)"). The transmitter is reenabled
through the UCRn to resume operation after a disable or software reset.
If the clear-to-send operation is enabled, UCTSn must be asserted for the character to be
transmitted. If UCTSn is negated in the middle of a transmission, the character in the shift
register is sent and UTXD remains in mark state until UCTSn is reasserted. If the
transmitter is forced to send a continuous low condition by issuing a
SEND BREAK
command, the transmitter ignores the state of UCTSn.
If the transmitter is programmed to automatically negate URTSn when a message
transmission completes, URTSn must be asserted manually before a message is sent. In
applications in which the transmitter is disabled after transmission is complete and URTSn
is appropriately programmed, URTSn is negated one bit time after the character in the shift
register is completely transmitted. The transmitter must be manually reenabled by
reasserting URTSn before the next message is to be sent.
Figure 23-20 shows the functional timing information for the transmitter.
MOTOROLA Chapter 23. UART Modules 23-21