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2
24.3 I
C System Configuration
2
The I
C module uses a serial data line (SDA) and a serial clock line (SCL) for data transfer.
2
For I
C compliance, all devices connected to these two signals must have open drain or
open collector outputs. The logic AND function is exercised on both lines with external
pull-up resistors.
2
Out of reset, the I
C default state is as a slave receiver. Thus, when not programmed to be
a master or responding to a slave transmit address, the I
default slave receiver state. See Section 24.6.1, "Initialization Sequence," for exceptions.
2
The I
C module is designed to be compatible with the Philips
2
I
C bus protocol. For information on system configuration,
protocol, and restrictions, see The I
Version 2.1.
2
24.4 I
C Protocol
Normally, a standard communication is composed of the following parts:
1. START signal—When no other device is bus master (both SCL and SDA lines are
at logic high), a device can initiate communication by sending a START signal (see
A in Figure 24-2). A START signal is defined as a high-to-low transition of SDA
while SCL is high. This signal denotes the beginning of a data transfer (each data
transfer can be several bytes long) and awakens all slaves.
msb
SCL
1
2
3
SDA
AD7 AD6 AD5 AD4 AD3 AD2 AD1 R/W
A
Calling Address
START
Signal
Figure 24-2. I
2. Slave address transmission—The master sends the slave address in the first byte
after the START signal (B). After the seven-bit calling address, it sends the R/W bit
(C), which tells the slave data transfer direction.
Each slave must have a unique address. An I
slave address; it cannot be master and slave at the same time.
MOTOROLA
Interrupt bit set
(Byte complete)
lsb
4
5
6
7
8
9
R/W
ACK
Bit
B
C
2
C Standard Communication Protocol
Chapter 24. I
2
C module should return to the
NOTE
2
C Bus Specification,
SCL held low while
Interrupt is serviced
msb
1
2
3
4
XXX
D7
D6 D5
D4
Data Byte
E
D
2
C master must not transmit its own
2
C Interface
2
I
C System Configuration
lsb
5
6
7
8
9
D3
D2 D1
D0
No
STOP
ACK
Signal
Bit
F
24-3
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