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• Externally gated single-scan mode
• Interval timer single-scan mode
Queue 2 cannot be programmed for externally gated
single-scan mode.
In all single-scan queue operating modes, queue execution is enabled by writing the
single-scan enable bit to a 1 in the queue's control register. The single-scan enable bits,
SSE1 and SSE2, are provided for queue 1 and queue 2, respectively.
Until a queue's single-scan enable bit is set, any trigger events for that queue are ignored.
The single-scan enable bit may be set to a 1 during the same write cycle that selects the
single-scan queue operating mode. The single-scan enable bit can be written only to 1, but
will always read 0. Once set, writing the single-scan enable bit to 0 has no effect. Only the
QADC can clear the single-scan enable bit. The completion flag, completion interrupt, or
queue status is used to determine when the queue has completed.
After the single-scan enable bit is set, a trigger event causes the QADC to begin execution
with the first CCW in the queue. The single-scan enable bit remains set until the queue is
completed. After the queue reaches completion, the QADC resets the single-scan enable bit
to 0. Writing the single-scan enable bit to a 1 or a 0 before the queue scan is complete has
no effect; however, if the queue operating mode is changed, the new queue operating mode
and the value of the single-scan enable bit are recognized immediately. The conversion in
progress is aborted, and the new queue operating mode takes effect.
In software-initiated single-scan mode, writing a 1 to the single-scan enable bit causes the
QADC to generate a trigger event internally, and queue execution begins immediately. In
the other single-scan queue operating modes, once the single-scan enable bit is written, the
selected trigger event must occur before the queue can start. The single-scan enable bit
allows the entire queue to be scanned once. A trigger overrun is captured if a trigger event
occurs during queue execution in an edge-sensitive external trigger mode or a
periodic/interval timer mode.
In the interval timer single-scan mode, the next expiration of the timer is the trigger event
for the queue. After queue execution is complete, the queue status is shown as idle. The
queue can be restarted by setting the single-scan enable bit to 1. Queue execution begins
with the first CCW in the queue.
27.8.6.1 Software-Initiated Single-Scan Mode
Software can initiate the execution of a scan sequence for queue 1 or 2 by selecting
software-initiated single-scan mode and writing the single-scan enable bit in QACR1 or
QACR2. A trigger event is generated internally and the QADC immediately begins
MOTOROLA
Chapter 27. Queued Analog-to-Digital Converter (QADC)
NOTE
Digital Control Subsystem
27-51
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