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Block Diagram
— External edge trigger and gated trigger
— Periodic/interval timer, within QADC module (queues 1 and 2)
— Software command
• Single scan or continuous scan of queues
• 64 result registers
• Output data readable in three formats:
— Right-justified unsigned
— Left-justified signed
— Left-justified unsigned
• Unused analog channels can be used as discrete input/output pins.
27.2 Block Diagram
External
Triggers
27-2
8 Analog Channels
External
(18 with External MUXing)
MUX Address
Analog Input MUX
and Digital
Signal Functions
Digital
Control
64-Entry Queue
of 10-bit
Conversion
Command Words
(CCWs)
IPBUS
Interface
Figure 27-1. QADC Block Diagram
MCF5282 User's Manual
Analog Power
Inputs
Reference
Inputs
10-bit
Analog-to-Digital
Converter
64-Entry Table
of 10-bit
Results
10-bit to 16-bit
Result Alignment
MOTOROLA
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