Qspi Data Register (Qdr); Qspi Address Register - Motorola ColdFire MCF5281 User Manual

Programming Model
The command and data RAM in the QSPI are indirectly accessible with QDR and QAR as
48 separate locations that comprise 16 words of transmit data, 16 words of receive data, and
16 bytes of commands.
A write to QDR causes data to be written to the RAM entry specified by QAR[ADDR].
This also causes the value in QAR to increment.
Correspondingly, a read at QDR returns the data in the RAM at the address specified by
QAR[ADDR]. This also causes QAR to increment. A read access requires a single wait
state.
The QAR does not wrap after the last queue entry within each
section of the RAM. The application software must handle
address range errors.
22.5.5 QSPI Address Register (QAR)
The QAR, shown in Figure 22-8, is used to specify the location in the QSPI RAM that read
and write operations affect.
15
Field
Reset
R/W
Address

22.5.6 QSPI Data Register (QDR)

The QDR, shown in Figure 22-9, is used to access QSPI RAM indirectly. The CPU reads
and writes all data from and to the QSPI RAM through this register.
15
Field
Reset
R/W
Address
22-14
NOTE
—
0000_0000_0000_0000
IPSBAR + 0x350
Figure 22-8. QSPI Address Register
0000_0000_0000_0000
IPSBAR + 0x354
Figure 22-9. QSPI Data Register (QDR)
MCF5282 User's Manual
6 5
R/W
DATA
R/W
0
ADDR
0
MOTOROLA