Table of Contents
Advertisement
• The system clock supplies an asynchronous clock source that is divided by 32 and
then divided by the 16-bit value programmed in UBG1n and UBG2n. See
Section 23.3.11, "UART Baud Rate Generator Registers (UBG1n/UBG2n)."
The choice of DTIN or system clock is programmed in the UCSR.
DTOUTn
DTINn
UTXDn
URXDn
System
Clock
If DTINn is a clocking source for either the timer or UART, that
timer module cannot use DTINn for timer capture.
23.5.1.2 Calculating Baud Rates
The following sections describe how to calculate baud rates.
23.5.1.2.1
System Clock Baud Rates
When the system clock is the UART clocking source, it goes through a divide-by-32
prescaler and then passes through the 16-bit divider of the concatenated UBG1n and
UBG2n registers. The baud-rate calculation is as follows:
Using a 66MHz system clock and letting baud rate = 9600, then
MOTOROLA
On-Chip
Timer Module
Clocking sources programmed in UCSR
Tx Buffer
Prescaler
Tx
Prescaler
Rx
Generator
Rx Buffer
Figure 23-18. Clocking Source Diagram
NOTE
Baudrate
=
Chapter 23. UART Modules
UART
DTIN
x1
16-Bit
Divider
16-Bit
DTIN
x16
Divider
16-Bit
Clock
Divider
SYSCLK
---------------------------------
[
]
32 x divider
Operation
x32
Prescaler
23-19
Advertisement
Table of Contents
