Motorola ColdFire MCF5281 User Manual page 782

Address
IPSBAR + 0x098
IPSBAR + 0x09C
IPSBAR + 0x0A2
IPSBAR + 0x0A4
IPSBAR + 0x0A8
IPSBAR + 0x0AE
IPSBAR + 0x0B0
IPSBAR + 0x0B4
IPSBAR + 0x0BA
IPSBAR + 0x0BC
IPSBAR + 0x0C0
IPSBAR + 0x0C6
IPSBAR + 0x0C8
IPSBAR + 0x0CC
IPSBAR + 0x0D2
IPSBAR + 0x100
IPSBAR + 0x104
IPSBAR + 0x108
IPSBAR + 0x10C
IPSBAR + 0x110
IPSBAR + 0x140
IPSBAR + 0x144
IPSBAR + 0x148
IPSBAR + 0x14C
IPSBAR + 0x150
IPSBAR + 0x180
IPSBAR + 0x184
IPSBAR + 0x188
IPSBAR + 0x18C
IPSBAR + 0x190
IPSBAR + 0x1C0
IPSBAR + 0x1C4
IPSBAR + 0x1C8
IPSBAR + 0x1CC
A-4
Table A-3. Register Memory Map (Continued)
Name
Chip Select Address Register 2
Chip Select Mask Register 2
Chip Select Control Register 2
Chip Select Address Register 2
Chip Select Mask Register 3
Chip Select Control Register 3
Chip Select Address Register 4
Chip Select Mask Register 4
Chip Select Control Register 4
Chip Select Address Register 5
Chip Select Mask Register 5
Chip Select Control Register 5
Chip Select Address Register 6
Chip Select Mask Register 6
Chip Select Control Register 6
DMA Registers
Source Address Register 0
Destination Address Register 0
DMA Control Register 0
Byte Count Register 0
DMA Status Register 0
Source Address Register 1
Destination Address Register 1
DMA Control Register 1
Byte Count Register 1
DMA Status Register 1
Source Address Register 2
Destination Address Register 2
DMA Control Register 2
Byte Count Register 2
DMA Status Register 2
Source Address Register 3
Destination Address Register 3
DMA Control Register 3
Byte Count Register 3
MCF5282 User's Manual
Mnemonic Size
CSAR2 16
CSMR2 32
CSCR2 16
CSAR3 16
CSMR3 32
CSCR3 16
CSAR4 16
CSMR4 32
CSCR4 16
CSAR5 16
CSMR5 32
CSCR5 16
CSAR6 16
CSMR6 32
CSCR6 16
SAR0 32
DAR0 32
DCR0 32
1
BCR0 32
DSR0 8
SAR1 32
DAR1 32
DCR1 32
1
BCR1 32
DSR1 8
SAR2 32
DAR2 32
DCR2 32
1
BCR2 32
DSR2 8
SAR3 32
DAR3 32
DCR3 32
1
BCR3 32
MOTOROLA