Gpacr Access_Ctrl Bit Encodings - Motorola ColdFire MCF5281 User Manual

Table 8-13. Grouped PeripheralAccess Control Register
Bits Name
7 LOCK
6–4 —
3–0 ACCESS_CTRL This 4-bit field defines the access control for the given memory region.
At reset, these on-chip modules are configured to have only supervisor read/write access
capabilities. Bit encodings for the ACCESS_CTRL field in the GPACR are shown in
Table 8-14. Table 8-15 shows the memory space protected by the GPACRs and the modules
mapped to these spaces.
Table 8-14. GPACR ACCESS_CTRL Bit Encodings
Bits
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
MOTOROLA
(GPACR) Field Descriptions
This bit, once set, prevents subsequent writes to the GPACR. Any attempted write to the
GPACR generates an error termination and the contents of the register are not affected.
Only a system reset clears this flag.
Reserved, should be cleared.
The encodings for this field are shown in Table 8-14.
Supervisor Mode
Read / Write
Read
Read
Read
Read / Write
Read / Write
Read / Write
No Access
Read / Write / Execute
Read / Execute
Read / Execute
Execute
Read / Write / Execute
Read / Write / Execute
Read / Write
Read / Write / Execute
Chapter 8. System Control Module (SCM)
System Access Control Unit (SACU)
Description
User Mode
No Access
No Access
Read
No Access
Read / Write
Read
Read / Write
No Access
No Access
No Access
Read / Execute
No Access
Read / Write / Execute
Read / Execute
Read
Execute
8-19