Result Registers; Right-Justified Unsigned Result Register (Rjurr); Multiplexed Channel Assignments And Signal Designations - Motorola ColdFire MCF5281 User Manual

Motorola microcontroller user's manual
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Table 27-17. Multiplexed Channel Assignments and Signal Designations
Port Signal
Analog
Name
Signal Name
PQB0
ANW
PQB1
ANX
PQB2
ANY
PQB3
ANZ
PQA0
PQA1
PQA3
AN55
PQA4
AN56
Low Reference
V
RL
High Reference
V
RH
1
All channels not listed are reserved or unimplemented and return undefined results.

27.6.8 Result Registers

The result word table is a 64 half-word (128 byte) long by 10-bit wide RAM. An entry is
written by the QADC after completing an analog conversion specified by the corresponding
CCW table entry.

27.6.8.1 Right-Justified Unsigned Result Register (RJURR)

15
Field
Reset
R/W:
7
Field
Reset
R/W:
Address
Figure 27-15. Right-Justified Unsigned Result Register (RJURR)
MOTOROLA
Multiplexed Input Signals
Other
Functions
MA0
MA1
ETRIG1
ETRIG2
(V
–V
)/2
RH
RL
End-of-Queue Code
0000_00
R
IPSBAR + 0x19_0280, 0x19_02fe
Chapter 27. Queued Analog-to-Digital Converter (QADC)
Signal Type
Input
Input
Input
Input
Output
Output
Input/Output
Input/Output
Input
Input
10
RESULT
Undefined
R/W
Register Descriptions
1
Channel Number
in CCW CHAN Field
Binary
Decimal
000XX0
0, 2, 4, 6
000XX1
1, 3, 5, 7
010XX0
16, 18, 20, 22
010XX1
17, 19, 21, 23
52
53
110111
55
111000
56
111100
60
111101
61
111110
62
111111
63
9
8
RESULT
Undefined
R/W
0
27-29

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