Terminology Conventions
Instruction
ACC
MAC accumulator register
CCR
Condition code register (lower byte of SR)
MACSR
MAC status register
MASK
MAC mask register
PC
Program counter
SR
Status register
DDATA
Debug data port
PST
Processor status port
#<data>
Immediate data following the 16-bit operation word of the instruction
<ea>
Effective address
<ea>y,<ea>x
Source and destination effective addresses, respectively
<label>
Assembly language program label
<list>
List of registers for MOVEM instruction (example: D3–D0)
<shift>
Shift operation: shift left (<<), shift right (>>)
<size>
Operand data size: byte (B), word (W), longword (L)
bc
Both instruction and data caches
dc
Data cache
ic
Instruction cache
# <vector>
Identifies the 4-bit vector number for trap instructions
<>
identifies an indirect data address referencing memory
<xxx>
identifies an absolute address referencing memory
dn
Signal displacement value, n bits wide (example: d16 is a 16-bit displacement)
SF
Scale factor (x1, x2, x4 for indexed addressing mode, <<1n>> for MAC operations)
+
Arithmetic addition or postincrement indicator
–
Arithmetic subtraction or predecrement indicator
x
Arithmetic multiplication
l
Table ii. Notational Conventions (Continued)
Register Names
Port Name
Miscellaneous Operands
Operations
MCF5282 User's Manual
Operand Syntax
MOTOROLA