Command Ram Registers (Qcr0–Qcr15); Qcr0–Qcr15 Field Descriptions - Motorola ColdFire MCF5281 User Manual

22.5.7 Command RAM Registers (QCR0–QCR15)
The command RAM is accessed using the upper byte of QDR. The QSPI cannot modify
information in command RAM.
There are 16 bytes in the command RAM. Each byte is divided into two fields. The chip
select field enables external peripherals for transfer. The command field provides transfer
operations.
The command RAM is accessed only using the most
significant byte of QDR and indirect addressing based on
QAR[ADDR].
Figure 22-10 shows the command RAM register.
15 14
Field CONT BITSE
Reset
R/W
Address
Figure 22-10. Command RAM Registers (QCR0–QCR15)
Table 22-8 gives QCR field descriptions.
Bits Name
15 CONT
14 BITSE
13 DT
12 DSCK
11–8 QSPI_CS
7–0 —
MOTOROLA Chapter 22. Queued Serial Peripheral Interface (QSPI) Module
NOTE
13 12 11
DT DSCK
Table 22-8. QCR0–QCR15 Field Descriptions
Continuous.
0 Chip selects return to inactive level defined by QWR[CSIV] when transfer is complete.
1 Chip selects remain asserted after the transfer of 16 words of data (see note below).
Bits per transfer enable.
0 Eight bits
1 Number of bits set in QMR[BITS]
Delay after transfer enable.
0 Default reset value.
1 The QSPI provides a variable delay at the end of serial transfer to facilitate interfacing with
peripherals that have a latency requirement. The delay between transfers is determined by
QDLYR[DTL].
Chip select to QSPI_CLK delay enable.
0 Chip select valid to QSPI_CLK transition is one-half QSPI_CLK period.
1 QDLYR[QCD] specifies the delay from QSPI_CS valid to QSPI_CLK.
Peripheral chip selects. Used to select an external device for serial data transfer. More than one chip
select may be active at once, and more than one device can be connected to each chip select. Bits
11–8 map directly to QSPI_CS[3:0], respectively. If it is desired to use those bits as a chip select
value, then an external demultiplexor must be connected to the QSPI_CS[3:0] pins.
Reserved, should be cleared.
8 7
QSPI_CS
Undefined
Write Only
QAR[ADDR]
Description
Programming Model
0
–
22-15