Software And Level N Iack Registers (Swiackr, L1Iack-L7Iack); Interrupt Source Assignment For Intc1 - Motorola ColdFire MCF5281 User Manual

Table 10-14. Interrupt Source Assignment for INTC1
Source Module Flag
1-7
8 FLEX BUF0I
CAN
9 BUF1I
10 BUF2I
11 BUF3I
12 BUF4I
13 BUF5I
14 BUF6I
15 BUF7I
16 BUF8I
17 BUF9I
18 BUF10I
19 BUF11I
20 BUF12I
21 BUF13I
22 BUF14I
23 BUF15I
24 ERR_INT Error interrupt
25 BOFF_INT Bus-off interrupt
26 WAKE_INT Wake-up interrupt
27-63
10.3.7 Software and Level n IACK Registers (SWIACKR,
L1IACK–L7IACK)
The eight IACK registers can be explicitly addressed via the CPU, or implicitly addressed
via a processor-generated interrupt acknowledge cycle during exception processing. In
either case, the interrupt controller's actions are very similar.
First, consider an IACK cycle to a specific level: that is, a level-n IACK. When this type of
IACK arrives in the interrupt controller, the controller examines all the currently-active
level n interrupt requests, determines the highest priority within the level, and then
responds with the unique vector number corresponding to that specific interrupt source.
The vector number is supplied as the data for the byte-sized IACK read cycle. In addition
to providing the vector number, the interrupt controller also loads the level and priority
number for the level into the IACKLPR register, where it may be retrieved later.
MOTOROLA
Source Description
Message buffer 0 interrupt
Message buffer 1 interrupt
Message buffer 2 interrupt
Message buffer 3 interrupt
Message buffer 4 interrupt
Message buffer 5 interrupt
Message buffer 6 interrupt
Message buffer 7 interrupt
Message buffer 8 interrupt
Message buffer 9 interrupt
Message buffer 10 interrupt
Message buffer 11 interrupt
Message buffer 12 interrupt
Message buffer 13 interrupt
Message buffer 14 interrupt
Message buffer 15 interrupt
Chapter 10. Interrupt Controller Modules
Flag Clearing Mechanism
Not Used
Write BUF0I = 1 after reading BUF0I = 1
Write BUF1I = 1 after reading BUF1I = 1
Write BUF2I = 1 after reading BUF2I = 1
Write BUF3I = 1 after reading BUF3I = 1
Write BUF4I = 1 after reading BUF4I = 1
Write BUF5I = 1 after reading BUF5I = 1
Write BUF6I = 1 after reading BUF6I = 1
Write BUF7I = 1 after reading BUF7I = 1
Write BUF8I = 1 after reading BUF8I = 1
Write BUF9I = 1 after reading BUF9I = 1
Write BUF10I = 1 after reading BUF10I = 1
Write BUF11I = 1 after reading BUF11I = 1
Write BUF12I = 1 after reading BUF12I = 1
Write BUF13I = 1 after reading BUF13I = 1
Write BUF14I = 1 after reading BUF14I = 1
Write BUF15I = 1 after reading BUF15I = 1
Read error bits in ESR or write ERR_INT = 0
Write BOFF_INT = 0
Write WAKE_INT = 0
Not used
Register Descriptions
10-15