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Table 14-1. MCF5282 Signal Description (Continued)
Signal Name
Development serial
output/Test data
Test clock
Debug data
Processor status
outputs
Test
QADC analog reference VRH, VRL
QADC analog supply
PLL analog supply
QADC positive supply
Flash erase/program
power
Flash array power
and ground
Standby power
Positive supply
Ground
Table 14-2 lists signals in alphabetical order by abbreviated name.
MOTOROLA
Abbreviation
DSO/TDO
Provides single-bit communication for
debug module responses (DSO).
Provides serial data port for outputting
JTAG logic data (TDO).
TCLK
JTAG test logic clock.
DDATA[3:0]
Display captured processor
addresses, data, and breakpoint
status.
PST[3:0]
Indicate core status.
Test Signals
TEST
Reserved, should be connected to
VSS.
Power and Reference Signals
High (VRH) and low (VRL) reference
potentials for the analog converter.
VDDA, VSSA
Isolate the QADC analog circuitry
from digital power supply noise.
VDDPLL, VSSPLL Isolate the PLL analog circuitry from
digital power supply noise.
VDDH
Supplies positive power to the ESD
structures in the QADC pads.
VPP
Used for Flash stress testing.
VDDF, VSSF
Supply power and ground to Flash
array.
VSTBY
Provides standby voltage to RAM
array if VDD is lost.
VDD
Supplies positive power to the core
logic and I/O pads.
VSS
Negative supply.
Chapter 14. Signal Descriptions
Function
Ground
Overview
I/O
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