Receive Descriptor Active Register (Rdar); Rdar Field Descriptions - Motorola ColdFire MCF5281 User Manual

The RDAR register is cleared at reset and when ECR[ETHER_EN] is cleared.
31
Field
Reset
R/W
15
Field
Reset
R/W
Address
Figure 17-6. Receive Descriptor Active Register (RDAR)
Bits
31–25
24 R_DES_ACTIVE Set to one when this register is written, regardless of the value written.
23–0
17.5.4.4 Transmit Descriptor Active Register (TDAR)
The TDAR is a command register which should be written by the user to indicate that the
transmit descriptor ring has been updated (transmit buffers have been produced by the
driver with the ready bit set in the buffer descriptor).
Whenever the register is written, the TDAR bit is set. This value is independent of the data
actually written by the user. When set, the FEC will poll the transmit descriptor ring and
process transmit frames (provided ECR[ETHER_EN] is also set). Once the FEC polls a
transmit descriptor whose ready bit is not set, then the FEC will clear the TDAR bit and
cease transmit descriptor ring polling until the user sets the bit again, signifying additional
descriptors have been placed into the transmit descriptor ring.
The TDAR register is cleared at reset, when ECR[ETHER_EN] is cleared, or when
ECR[RESET] is set.
MOTOROLA
—
0000_0000_0000_0000
0000_0000_0000_0000
Table 17-14. RDAR Field Descriptions
Name
— Reserved, should be cleared.
Cleared by the FEC device whenever no additional "empty" descriptors
remain in the receive ring. Also cleared when ECR[ETHER_EN] is cleared.
— Reserved, should be cleared.
Chapter 17. Fast Ethernet Controller (FEC)
25 24 23
R_DES_ACTIVE
R/W
—
R/W
IPSBAR + 0x1010
Description
Programming Model
16
—
0
17-27