Functional Description; Low-Power Modes; Pll/Clkout Stop Mode Operation - Motorola ColdFire MCF5281 User Manual

STPMD[1:0]
System Clocks
00 Disabled
01 Disabled
10 Disabled
11 Disabled
If LPCR[LPMD] is cleared, then the MCF5282 will stop
executing code upon issue of a STOP instruction. However, no
clocks will be disabled.
7.3

Functional Description

The functions and characteristics of the low-power modes, and how each module is affected
by, or affects, these modes are discussed in this section.
7.3.1

Low-Power Modes

The system enters a low-power mode by executing a STOP instruction. Which mode the
device actually enters (either stop, wait, or doze) depends on what is programmed in
LPCR[LPMD]. Entry into any of these modes idles the CPU with no cycles active, powers
down the system and stops all internal clocks appropriately. During stop mode, the system
clock is stopped low.
For entry into stop mode, the LPICR[ENBSTOP] bit must be set before a STOP instruction
is issued.
A wakeup event is required to exit a low-power mode and return to run mode. Wakeup
events consist of any of these conditions:
• Any type of reset
• Any valid, enabled interrupt request
MOTOROLA
Table 7-5. Low-Power Modes
LPMD[1:0]
11
10
01
00
Table 7-6. PLL/CLKOUT Stop Mode Operation
CLKOUT
Enabled
Disabled
Disabled
Disabled
Chapter 7. Power Management
Mode
STOP
WAIT
DOZE
RUN
Operation During Stop Mode
PLL
Enabled
Enabled
Disabled
Disabled
NOTE
Functional Description
OSC PMM
Enabled Enabled
Enabled Enabled
Enabled Enabled
Disabled Low-Power Option
7-5