Refclk Guidelines; Overview - Xilinx Virtex-5 RocketIO GTP User Manual

R
Table 10-3: TERMINATION_CTRL Attribute Encoding (Continued)

REFCLK Guidelines

Overview

This section focuses on the selection of the reference clock source or oscillator. An oscillator
is characterized by:
•
•
•
•
•
•
•
•
These characteristics are selection criteria when choosing an oscillator for a GTP
transceiver design.
Figure 10-6
to-peak as used in the GTP transceiver portion of the Virtex-5 Data Sheet.
+V
MGTREFCLKP
MGTREFCLKN
0
Figure 10-6: Single-Ended Clock Input Voltage Swing, Peak-to-Peak
Figure 10-7
defined as MGTREFCLKP – MGTREFCLKN.
+V
MGTREFCLKP – MGTREFCLKN
0
–V
Figure 10-7: Differential Clock Input Voltage Swing, Peak-to-Peak
Virtex-5 RocketIO GTP Transceiver User Guide
UG196 (v1.3) May 25, 2007
TERMINATION_CTRL [4:0]
1 1 1 1
1 1 1 1
Frequency range
Output voltage swing
Jitter (deterministic, random, peak-to-peak)
Rise and fall times
Supply voltage and current
Noise specification
Duty cycle and duty-cycle tolerance
Frequency stability
illustrates the convention for the single-ended clock input voltage swing, peak-
illustrates the differential clock input voltage swing, peak-to-peak, which is
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Nominal
+25% Resistance
Resistance [Ω]
0 39.9
1 39.1
REFCLK Guidelines
-25% Resistance
[Ω] [Ω]
49.8 29.9
48.8 29.3
V
UG196_c10_06_110206
V
IDIFF
UG196_c10_07_110206
ISE
207