Gtp Reference Clock Checklist; Description; Oscillator Selection; Sourcing More Than One Differential Clock Input Pair From One Oscillator - Xilinx Virtex-5 RocketIO GTP User Manual

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GTP Reference Clock Checklist

The following criteria must be met when choosing an oscillator for a design with GTP
transceivers:
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Description

Oscillator Selection

Selecting an oscillator and designing a clock distribution system requires a careful
selection of components as well as a proper board layout to ensure that overall system
requirements are met.
When designing a clocking system for a design with a GTP transceiver, the requirements of
the implemented standard (Ethernet, OC-48, SDI, etc.) as well as the requirements given in
the GTP Transceiver section of the Virtex-5 Data Sheet must be fulfilled. However, the
requirements for the GTP transceiver reference clock as specified in the Virtex-5 Data Sheet
must be met or exceeded. Under these conditions, the GTP transceiver was characterized
as specified in the Virtex-5 Data Sheet.
The differential clock input of the GTP_DUAL primitive requires AC coupling capacitors
between the oscillator output pins and the dedicated clock input pins of the Virtex-5
device.

Sourcing More Than One Differential Clock Input Pair from One Oscillator

If a clock needs to be shared between more than seven GTP_DUAL primitives of a Virtex-5
device, more than one differential clock input pair is required. Either an oscillator with
multiple outputs or a single output oscillator and a multi-output clock buffer is required.
The connection between the dedicated clock input pin pair of a GTP_DUAL primitive and
the outputs of the oscillator or buffer MUST be a point-to-point connection. No bifurcated
transmission lines, "T-stubs", branches, or daisy-chaining are permitted!
Virtex-5 RocketIO GTP Transceiver User Guide
UG196 (v1.3) May 25, 2007
Provide AC coupling between the oscillator output pins and the Virtex-5 dedicated
GTP_DUAL clock input pins.
Ensure that the differential voltage swing of the reference clock is the range as
specified in the Virtex-5 Data Sheet (the nominal range is 200 mV-2000 mV, and the
nominal typical value is 1200 mV).
Meet or exceed the reference clock characteristics as specified in the Virtex-5 Data
Sheet.
Meet or exceed the reference clock characteristics as specified in the standard for
which the GTP transceiver provides physical layer support.
Fulfill the oscillator vendor's requirement regarding power supply, board layout, and
noise specification.
Provide a dedicated point-to-point connection between the oscillator and GTP_DUAL
clock input pins.
Keep impedance discontinuities on the differential transmission lines to a minimum
(impedance discontinuities generate jitter).
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REFCLK Guidelines
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