Xilinx Virtex-5 RocketIO GTP User Manual page 205

R
The calculated calibration value of the resistor calibration circuit is shared between all
GTP_DUAL primitives of a device (see
MGTAVTTTX (1)
RREF
External 50 Ω
Precision Resistor
Notes:
1. This analog supply must be sourced directly from the closest MGTAVTTTX device pin.
Figure 10-5: Calibration Result Sharing Between All GTP_DUAL Tiles
The resistor calibration is performed automatically one time during the configuration
process. All analog supply voltages must be present and within the proper tolerance as
specified in the Virtex-5 Data Sheet.
This value can be overwritten independently for each transceiver by using the
TERMINATION_CTRL and TERMINATION_OVRD attributes. This feature is intended for
experimental purposes only.
Virtex-5 RocketIO GTP Transceiver User Guide
UG196 (v1.3) May 25, 2007
Override/Offset
Code
Other GTP_DUAL Tiles North of the Center
MGTRREF
Package Pin
Override/Offset
Code
Other GTP_DUAL Tiles South of the Center
www.xilinx.com
Figure 10-5).
BRcal
rCtrl[0:4]
Internal Resistor
Network
"Master" GTP_DUAL Tile
for Resistor Calibration
Analog Design Guidelines
RX/TX
Termination
RX/TX
Termination
UG196_c10_05_041907
205