Tuning The Cdr - Xilinx Virtex-5 RocketIO GTP User Manual

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Tuning the CDR

Depending upon application requirements, the PMA_RX_CFG attribute can be used to
optimize the performance of the CDR. It controls specific functions of the CDR and its loop
filter. When using this parameter, the transceiver will not operate unless used as
recommended in this section. The CDR includes an optional second-order loop to let the
CDR track the incoming data with wider frequency differences.
The optimum PMA_RX_CFG settings for the CDR are outlined in this section for three
possible application categories. In
is for information purposes only since it is automatically set by the PMA_RX_CFG value.
Normal Operation Mode
Synchronous-systems applications are where the local reference clock and the reference
clock of incoming data come from the same source (SONET for example). In some other
synchronous-system applications, the system interface is synchronized where a clean-up
PLL cleans the recovered clock and uses it as the local reference clock for the GTP_DUAL
tile.
Spread-spectrum applications, such as Serial ATA, use spread-spectrum clocking where
both the local reference clock and the incoming data is frequency modulated with up to
0.5% downspread. For SATA, the interface can be asynchronous where along with
instantaneous frequency differences caused by the spread-spectrum modulation, there can
also be a ±350 ppm static frequency difference between the local reference clock and the
reference clock of incoming data.
Spread-spectrum clocking applications in synchronous systems is when the spread
spectrum clock is applied to both sides of the link simultaneously and the two
communicating ports are not allowed to differ by more than 600 ppm at any time (PCI
Express systems).
All applications where a Lock-to-reference scheme or oversampling mode is not required
must configure the CDR for normal-operation mode.
Applications Using GTP Oversampling Mode
System interfaces running between 100 MB/s and 500 MB/s are required to use the GTP
transceiver's built-in 5x over-sampler. These systems must use the PMA_RX_CFG attribute
settings for the Oversampling mode.
Applications Using Lock-to-Reference Mode
In some applications, it is better for the CDR to sample data using the local reference clock
without attempting to lock to the incoming frequency (lock-to-reference). Lock-to-
reference is typically used in applications that perform digital over-sampling in the FPGA
logic.
mode.
Table 7-11: Required PMA_RX_CFG Setting for Different Operation Modes
Virtex-5 RocketIO GTP Transceiver User Guide
UG196 (v1.3) May 25, 2007
Table 7-11 shows the required PMA_RX_CFG to put the CDR into lock-to-reference
Application
Normal operation mode
Oversampling mode
Lock-to-reference mode
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RX Clock Data Recovery (CDR)
Table 7-11, the last column (second-order loop On/Off)
PMA_RX_CFG Setting
25'h09F0089
25'h09F0088
25'h09F0000
nd
2 Order Loop
On
On
On
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