Additional Support Resources; Typographical Conventions - Xilinx Virtex-5 RocketIO GTP User Manual

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The following documents provide supplemental material useful to this user guide:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. UG024,
11. UG076, Virtex-4
12. XAPP209, IEEE 802.3 Cyclic Redundancy Check
13. XAPP562, Configurable LocalLink CRC Reference Design

Additional Support Resources

To search the database of silicon and software questions and answers, or to create a
technical support case in WebCase, see the Xilinx website at:
http://www.xilinx.com/support.

Typographical Conventions

This document uses the following typographical conventions. An example illustrates each
convention.
Virtex-5 RocketIO GTP Transceiver User Guide
UG196 (v1.3) May 25, 2007
Synthesis and Simulation Design Guide
http://www.xilinx.com/support/sw_manuals/xilinx9/download/
Granberg, Tom. Handbook of Digital Techniques for High-Speed Design. Prentice-Hall. ISBN 0-
13-142291-X.
Grover, Frederick W., Ph.D. 1946. Inductance Calculations: Working Formulas and Tables. New
York: D. Van Nostrand Company, Inc.
Johnson, Howard. Signal Integrity Techniques and Loss Budgeting for RocketIO Transceivers
http://www.xilinx.com/products/design_resources/signal_integrity/resource/hojo_dvd.htm
Johnson, Howard, Martin Graham. High-Speed Signal Propagation: Advanced Black Magic.
Prentice-Hall. ISBN 0-13-084408-X.
Montrose, Mark I. 1999. EMC and the Printed Circuit Board. The Institute of Electrical and
Electronics Engineers, Inc. ISBN 0-7803-4703-X.
Smith, Larry D. November 1984. Decoupling Capacitor Calculations for CMOS Circuits.
Proceedings EPEP Conference.
Williams, Ross N. The Painless Guide to CRC Error Detection Algorithms.
http://www.ross.net/crc/
DS083, Virtex-II Pro and Virtex-II Pro X Platform FPGAs Complete Data Sheet
RocketIO Transceiver User Guide
RocketIO Multi-Gigabit Transceiver User Guide
Convention
References to other documents
Italic font
Emphasis in text
Underlined Text Indicates a link to a web page.
www.xilinx.com
(CRC pitstop).
Meaning or Use
Additional Support Resources
Example
See the Virtex-5 Configuration
Guide for more information.
The address (F) is asserted after
clock event 2.
http://www.xilinx.com/virtex5
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