Implementation Of The Crc Block; References - Xilinx Virtex-5 RocketIO GTP User Manual

Chapter 8: Cyclic Redundancy Check (CRC)

Implementation of the CRC Block

Figure 8-5
CRCINA[31:0]
CRCDATAWIDTH[1:0]
CRCDATAVALID
CRCCLK
CRCRESET
CRCINB64[31:0]
CRCDATAWIDTH64A
CRCDATAVALID
CRCCLK

References

Refer to XAPP209
194
shows an implementation of the CRC.
BANK 1_REG BANK 2_REG
BANK 1_REG 1 BANK 2_REG 1
BANK 1_REG 2 BANK 2_REG 2
Figure 8-5: CRC Implementation
[Ref 12] and XAPP562
www.xilinx.com
{CRCDATAWIDTH64A, CRCDATAWIDTHA}
[Ref 13] for more information on CRC.
Virtex-5 RocketIO GTP Transceiver User Guide
CRCOUT[31:0]
CRC_CALC
(XOR Bank)
Note:
The CRCOUT is Byte Rotated
and Bit Inverted.
UG196_c8_05_100506
UG196 (v1.3) May 25, 2007
R