The Crc Primitive - Xilinx Virtex-5 RocketIO GTP User Manual

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Chapter 8: Cyclic Redundancy Check (CRC)

The CRC Primitive

Each CRC block computes a 32-bit CRC using the CRC32 polynomial specified for PCI
Express, Gigabit Ethernet, and other common protocols. The CRC32 polynomial is:
32
26
( )
G X
=
X
+
X
There are two primitives for instantiating CRC integrated blocks. The 32-bit CRC primitive
(CRC32) can process 8, 16, 24, or 32-bit input data and generates a 32-bit CRC. The 64-bit
primitive (CRC64) can process 8, 16, 24, 32, 40, 56, or 64-bit input data and also generates a
32-bit CRC. Using the CRC64 primitive consumes both CRC integrated blocks paired with
a given transceiver tile.
Table 8-4: CRC32 – Valid Data Widths
CRCDATAWIDTH[2:0]
Notes:
1. CRCDATAWIDTH[2] must ALWAYS be set to 0 for the CRC32 primitive.
For CRC64, CRCDATAWIDTH is interpreted as indicated in
Table 8-5: CRC64 – Valid Data Widths
CRCDATAWIDTH[2:0]
190
23
22
16
12
+
X
+
X
+
X
+
X
+
000
001
010
011
000
001
010
011
100
101
110
111
www.xilinx.com
11
10
8
7
5
X
+
X
+
X
+
X
+
X
+
Data Width
8-bit
16-bit
24-bit
32-bit
Data Width
8-bit
16-bit
24-bit
32-bit
40-bit
48-bit
56-bit
64-bit
Virtex-5 RocketIO GTP Transceiver User Guide
4
2
Equation 8-1
X
+
X
+
X
+
1
CRC Data Bus Bits
CRCIN[31:24]
CRCIN[31:16]
CRCIN[31:8]
CRCIN[31:0]
Table
8-5.
CRC Data Bus Bits
CRCIN[63:56]
CRCIN[63:48]
CRCIN[63:40]
CRCIN[63:32]
CRCIN[63:24]
CRCIN[63:16]
CRCIN[63:8]
CRCIN[63:0]
UG196 (v1.3) May 25, 2007
R

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