Description; Gtp Reset In Response To Completion Of Configuration - Xilinx Virtex-5 RocketIO GTP User Manual

Chapter 5: Tile Features

Description

GTP Reset in Response to Completion of Configuration

Figure 5-7
a powered-up GTP_DUAL tile. The same sequence is activated any time
PLLPOWERDOWN goes from High to Low during normal operation.
Refer to
The following GTP_DUAL sections are affected by the reset sequence after configuration:
•
•
•
•
•
74
shows the GTP_DUAL reset sequence following completion of configuration of
"Power Control," page 81
cfg_reset_b
Global
grestore_b
Configuration
Signals
gwe_b
Internal TXRESET
Internal RXRESET
Internal RXBUFRESET
Notes:
1. The timing of the reset sequencer inside the GTP_DUAL tile depends on the frequency of CLK25.
The estimates given in this figure assume that the frequency of CLK25 is 25 MHz.
Figure 5-7: GTP_DUAL Reset Sequence Following Configuration
Shared PLL
GTP0 transmit section (PMA and PCS)
GTP0 receive section (PMA and PCS)
GTP1 transmit section (PMA and PCS)
GTP1 receive section (PMA and PCS)
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on power-down for details about PLLPOWERDOWN.
(1)
Virtex-5 RocketIO GTP Transceiver User Guide
~160 μs
UG196_c5_07_100606
UG196 (v1.3) May 25, 2007
R