Xilinx Virtex-5 RocketIO GTP User Manual page 305

R
Table D-10: DRP Addresses 38 through 3F (Continued)
Bit
38
CLK_COR_ CLK_COR_
4 REPEAT_WAIT MAX_LAT_
_0[2]
CLK_COR_ CLK_COR_
5 REPEAT_WAIT KEEP_IDLE_
_0[3]
CLK_COR_
CLK_COR_
INSERT_
6 REPEAT_WAIT
IDLE_FLAG_
_0[4]
CLK_ CLK_COR_
7 CORRECT_ DET_LEN_
USE_0
CLK_COR_ CLK_COR_
8 PRECEDENCE_ DET_LEN_
0
CLK_COR_ CLK_COR_
9 MIN_LAT_ ADJ_LEN_
0[0]
CLK_COR_ CLK_COR_
10 MIN_LAT_ ADJ_LEN_0[1
0[1]
CLK_COR_
11 MIN_LAT_ BOND_SEQ_
0[2] LEN_0[0]
CLK_COR_
12 MIN_LAT_ BOND_SEQ_
0[3] LEN_0[1]
CLK_COR_
13 MIN_LAT_ BOND_SEQ_
0[4]
CLK_COR_
BOND_SEQ_
14 MIN_LAT_
2_ENABLE_
0[5]
CLK_COR_
BOND_SEQ_
15 MAX_LAT_
2_ENABLE_
0[0]
Virtex-5 RocketIO GTP Transceiver User Guide
UG196 (v1.3) May 25, 2007
39 3A
OOBDETECT_
THRESHOLD
0[5] _0[1]
OOBDETECT_
THRESHOLD
0 _0[2]
Do Not
Modify
0
Do Not
Modify
0[0]
TX_XCLK_
SEL_0
0[1]
Do Not
Modify
0[0]
Do Not
Modify
]
CHAN_
Do Not
Modify
CHAN_
Do Not TX_BUFFER_
Modify
CHAN_
Do Not
TIME_TO_P2
Modify
2_USE_0
CHAN_
Do Not
TIME_TO_P2
Modify
0[1]
CHAN_
Do Not
TIME_TO_P2
Modify
0[2]
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Address
3B 3C
TRANS_
Do Not
TIME_TO_P2 TIME_NON_
Modify
_0[7]
TRANS_
Do Not
TIME_TO_P2 TIME_NON_
Modify
_0[8]
TRANS_
Do Not
TIME_TO_P2 TIME_NON_
Modify
_0[9]
TRANS_
Do Not
TIME_TO_P2 TIME_NON_
Modify
_0[10]
TRANS_
Do Not
TIME_TO_P2 TIME_NON_
Modify
_0[11]
TRANS_
Do Not
TIME_TO_P2 TIME_NON_
Modify
_0[12]
TRANS_
Do Not
TIME_TO_P2 TIME_NON_
Modify
_0[13]
TRANS_
Do Not
TIME_TO_P2 TIME_NON_
Modify
_0[14]
TRANS_
TIME_TO_P2 TIME_NON_
USE_0
_0[15]
TRANS_ TRANS_
TIME_NON_ TIME_FROM
_0[0] P2_0[0]
TRANS_ TRANS_
TIME_NON_ TIME_FROM
_0[1] P2_0[1]
TRANS_ TRANS_
TIME_NON_ TIME_FROM
_0[2] P2_0[2]
DRP Address by Bit Location
3D 3E
TRANS_ TRANS_
SATA_MIN_
TIME_FROM
P2_0[7] _P2_0[7]
TRANS_ TRANS_
SATA_MIN_
TIME_FROM
P2_0[8] _P2_0[8]
TRANS_ TRANS_
SATA_MIN_
TIME_FROM
P2_0[9] _P2_0[9]
TRANS_ TRANS_
SATA_MIN_
TIME_FROM
P2_0[10] _P2_0[10]
TRANS_ TRANS_
SATA_MIN_
TIME_FROM
P2_0[11] _P2_0[11]
TRANS_ TRANS_
SATA_MIN_
TIME_FROM
P2_0[12] _P2_0[12]
TRANS_ TRANS_
SATA_MIN_
TIME_FROM
BURST_0[0]
P2_0[13] _P2_0[13]
TRANS_ TRANS_
SATA_MIN_
TIME_FROM
BURST_0[1]
P2_0[14] _P2_0[14]
TRANS_ TRANS_
SATA_MIN_
TIME_FROM
BURST_0[2]
P2_0[15] _P2_0[15]
TRANS_
Do Not SATA_MIN_
Modify BURST_0[3]
_P2_0[0]
TRANS_
SATA_MIN_ SATA_MIN_
WAKE_0[0] BURST_0[4]
_P2_0[1]
TRANS_
SATA_MIN_ SATA_MIN_
WAKE_0[1] BURST_0[5]
_P2_0[2]
3F
INIT_0[0]
INIT_0[1]
INIT_0[2]
INIT_0[3]
INIT_0[4]
INIT_0[5]
305