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Chapter 14: Guidelines and Examples
Press-fit connectors require large vias that allow the connector pins to be inserted. These
vias are on a fixed pitch to match the pitch of the connector pins. Having large vias on a
tight pitch results in excess capacitance.
To mitigate this excess capacitance, via stubs must be kept short. Because the connector pin
is around 95 mils, backdrilling can only be done to that depth. Routing on the lower layers
helps to reduce the via stub length.
Making the antipads around the differential vias as large as possible minimizes
capacitance. As shown in
reference for the traces extends beyond the edge of the striplines by about 3 mils.
All power and ground planes that do not provide an impedance reference to the striplines
or microstrips should be removed. Vias need to be distributed around the periphery of the
connector to stitch the ground planes together.
The designer is recommended to taper the wide microstrips or striplines as they enter the
connector footprint. However, this technique has not yet been fully validated. The reduced
trace width causes additional line loss and inter-symbol interference (ISI) effects from the
greater impedance variation. These effects can be offset by the additional performance
gained from larger antipads with less excess capacitance.
254
Figure 14-4: Tyco Z-PACK HM-Zd Press-Fit Connector Design Example
Figure
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14-4, the antipad size is maximized such that the ground
Virtex-5 RocketIO GTP Transceiver User Guide
UG196_c14_04_051406
UG196 (v1.3) May 25, 2007
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