Appendix A: Mgt To Gtp Transceiver Design Migration; Overview; Primary Differences; Mgts Per Device - Xilinx Virtex-5 RocketIO GTP User Manual

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MGT to GTP Transceiver Design
Migration

Overview

This appendix describes important differences regarding migration from the Virtex-II Pro
and Virtex-4 multi-gigabit transceivers (MGTs) to the Virtex-5 GTP transceivers. This
appendix does not describe all of the features and capabilities of these devices but only
highlights relevant PCB, power supply, and reference clock differences. For more
information on Virtex-II Pro and Virtex-4 FPGAs, refer to Virtex-II Pro and Virtex-II Pro X
Complete Data Sheet
Multi-Gigabit Transceiver User Guide

Primary Differences

Virtex-5 LXT and SXT FPGAs are a different family from the Virtex-II Pro and Virtex-4
families. The Virtex-5 LXT and SXT devices are not pin compatible with these previous
generation devices. However, many aspects of the MGTs and GTP transceivers between
the families are the same. The primary differences between these families are:

MGTs per Device

Virtex-5 FPGAs allow for a large range of GTP transceivers per device.
number of transceivers available for each family.
Table A-1: Transceivers per Device
Virtex-5 RocketIO GTP Transceiver User Guide
UG196 (v1.3) May 25, 2007
[Ref
9], RocketIO Transceiver User Guide
Number of MGTs and GTP transceivers per device
Clocking
Serial rates and ranges
Encoding standards – 8B/10B, 64B/66B, SONET, and others
Clock multiplier settings and PLL ranges
Flexibility due to partial reconfiguration, PMA programming bus, dynamic
reconfiguration port (DRP)
Board design guidelines
Virtex Device
Virtex-II Pro FPGA
Virtex-4 FPGA
www.xilinx.com
[Ref
[Ref
11].
# of Transceivers
4, 8, 12, 16, 20
8, 12, 16, 20, 24
Appendix A
10], and Virtex-4 RocketIO
Table A-1
shows the
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