Xilinx Virtex-5 RocketIO GTP User Manual page 78

Chapter 5: Tile Features
Table 5-7: Available Resets Pins and the Components Reset by These Reset Pins (Continued)
RX PMA SIPO
RX CDR
RX Termination and
Equalization
RX OOB
Loopback Loopback paths
The reset that occurs after configuration and the GTPRESET port are the most common
ways to prepare GTP_DUAL(s) for operation, but certain situations can require the use of
other reset ports.
Table 5-8: Recommended Resets for Common Situations
Situation
Power Up and Configuration
Turning on a reference clock
Changing a reference clock
Parallel clock source reset
Remote Power Up
SATA OOB / PCI Express
Electrical Idle
Connecting RXN/RXP
After a TX buffer error
After an RX buffer error
Before channel bonding
PRBS error
Over-sampler error
Notes:
1. The recommended reset has the smallest impact on the other compents of the GTP_DUAL tile.
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Table 5-8
Components to be Reset
Entire GTP_DUAL tile
Shared PLL
Shared PLL
TX PCS, RX PCS, Phase Alignment
RX CDR
RX CDR
RX CDR
TX Buffer
RX Buffer
RX CDR, then RXBUFFER after CDR is locked
PRBS Error counter
Over-sampler
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outlines some of these situations, and the recommended resets.
Virtex-5 RocketIO GTP Transceiver User Guide
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Recommended Reset
Reset after configuration is
automatic.
GTPRESET
GTPRESET
TXRESET, RXRESET
RXELECIDLERESET
RXELECIDLERESET
RXELECIDLERESET
TXRESET
RXBUFRESET
RXELECIDLERESET,
RXBUFRESET
PRBSCNTRESET
RXRESET
UG196 (v1.3) May 25, 2007
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